Embodiments of the present disclosure relate to improving electrical characteristics of package substrates and semiconductor packages including the same.
In general, a semiconductor package includes a package substrate and a semiconductor chip mounted on the package substrate. The semiconductor chip may be electrically connected to the semiconductor package through bonding wires. In addition, a power supply voltage and/or electrical signals may be transmitted through the bonding wires. Further, the package substrate may include a power supply line, a ground line, and signal lines. The package substrate and the semiconductor chip may communicate with an external device through the power supply line, the ground line, and the signal lines.
Recently, semiconductor packages have become smaller, thinner, and faster. As a result, the semiconductor packages may suffer from severe electrical interference between the power supply line, the ground line, and the signal lines. The electrical interference between the signal lines may cause a signal transmission delay and/or electrical signal noises. Thus, various design schemes and structures of the semiconductor packages have been continuously developed to solve the problems that may be associated with electrical interference.